1. Field of the Invention
This invention relates generally to the processing of decimal numeric operands by a microprogrammed data processing system and more particularly to the prediction of the number of words of the operand the system will process and the number of cycles of delay between the cycle the first word of the operand is received from memory by a decimal unit for assembly and alignment and the cycle the assembled and aligned word is sent to an execution unit from the decimal unit for processing in accordance with a decimal numeric instruction.
2. Description of the Prior Art
Data processing systems process data stored in memory. The data may be in many forms including decimal digits. Computer instructions are also stored in memory. Some of the instructions when processed by the data processing system result in arithmetic operations being performed on the decimal digits. For example, a decimal instruction may be processed by the computing system to add one set of decimal digits--operand 1, from one group of memory locations to another set of memory locations--operand 2, and place the answer--operand 3, into a third group of memory locations.
For normal processing, the maximum number of decimal characters in an operand in the Honeywell 6000 system is 64 characters. The Honeywell 6000 used hardware registers which were capable of storing the 64 characters. The Honeywell 6000 is described in the publication entitled "Series 6000 Summary Description" copyright 1972 by Honeywell Information Systems Inc. (Order No. DA48). Very rarely are operands 64 characters long. A large portion of the operands will require 15 decimal digits or less during normal business processing.
Microprogrammed computing systems such as are described in U.S. Pat. No. 4,156,278 are developed to reduce the amount of hardware required in systems like the Honeywell 6000 by processing the words of the operands under firmware control through the use of firmware subroutines in a serial fashion. The microprogrammed system such as described in U.S. Pat. No. 4,156,278 includes hardware registers in an execution unit to store a maximum of 15 decimal digits of a 4 bits per decimal digit with the remainder of the decimal digits in an operand stored in a scratch pad memory. Operands comprising from 1 to 5 words stored in main memory may have less than 16 decimal digits (up to four nine-bit decimal digits or eight four-bit decimal digits are stored in a word). The firmware routines that store the decimal digits in the hardware registers of the execution unit therefore require a considerable number of firmware steps to load the maximum of 16 decimal digits into the registers for processing. Considerable time is spend by the firmware routine in just looping, waiting for the words from main memory.